What you'll do
Technical Leadership & Mentorship:
Act as the technical anchor and lead within the application engineering team
Mentor and coach intermediate engineers on SOC methodologies, debug techniques, and best practices
Participate in R&D technical reviews of customer designs, implementation strategies, and validation plans
Customer-Facing IP Integration & Support:
Serve as the primary technical expert for key customers, architecting and guiding the integration of our PCIe IP into their SOC designs
Provide expert-level guidance on front-end and back-end design challenges, including validation, synthesis, DFT/ATE, signal integrity/power integrity, physical design, etc.
Tape-Out and Silicon Bring-Up:
Own and drive the technical relationship with customers through the critical tape-out phase
Lead post-silicon validation and debug activities, working closely with customers to bring up new silicon efficiently
Product & Methodology Enablement:
Work closely with internal R&D and Design teams to gain early expertise on new IP, product features, and process technologies
Provide critical, field-driven feedback from customers to influence the architecture and design of future products
What you'll need
BSc/MSc in Electrical Engineering or related fields
15+ years of experience in ASIC/SOC design, implementation, or applications
10+ years of experience with silicon bring-up, characterization, and debugging
Why this matters
Ensuring reliable, high-performance chip solutions
Building strong customer relationships
Driving adoption of Synopsys IP technologies
Speeding customer time-to-market
Providing feedback to influence product development
Strengthening Synopsys’ industry leadership
