Opening. Our team is seeking for an Analog Layout Design Engineer to become a part of Synopsys.
What you'll do
Work on custom layout Analog IPs like High Speed IOs, PLL, DLL, Bandgap, High Speed macros for PHY, Clock trees…
- Floor planning, power design, signal routing strategy, EMIR awareness, parasitic optimization for layout blocks from schematics
- Do layout verification for DRC/LVS/ERC/ANT/ESD/DFM
- Complete all design quality checks and data quality checks
- Report design and status to mentors and design leads.
- Create documents that required by the given tasks
What you need
- Bachelor's or Master's degree or above, major in Electrical, Electronic and Telecommunication Engineering, Computer Science, Automation and Control, Mechatronic Engineering or any other relevant.
- 1-2 year working experience in the similar position (Fresh graduates are also welcomed and offered the on-the-job training to adapt the position's requirements.)
- Interested in IC design and desire to persuade long term career path with IC design.
- Good at English communication skills
- Good team player; Highly responsible and Self-motivated.