What you'll do
You'll be responsible for specifying, designing, and implementing state-of-the-art verification environments for the DesignWare family of synthesizable cores.
- Performing verification tasks for IP cores, including test planning and environment coding at both unit and system levels.
- Developing and implementing test cases, debugging, functional coverage coding, and testing to meet quality metric goals.
- Managing regression and ensuring adherence to verification methodologies.
- Collaborating closely with RTL designers and a global team of verification engineers.
What you need
- BSEE in Electrical Engineering with 12+ years of relevant experience or MSEE with 10+ years of relevant experience.
- Experience in architecting verification environments for complex serial protocols.
- Proficiency in HVL (System Verilog) and industry-standard simulators such as VCS, NC, and MTI.
- Expertise in verification methodologies such as VMM, OVM, and UVM.
- Knowledge of protocols like MIPI-I3C, UFS, Unipro, AMBA, SD/eMMC, Ethernet, DDR, PCIe, and USB.
Why this matters
- Enhancing the reliability and performance of Synopsys' IP cores through meticulous verification processes.
- Contributing to the development of cutting-edge connectivity protocols.
- Driving innovation in chip design and verification, supporting the creation of high-performance silicon chips.
- Ensuring the delivery of high-quality IP cores to our customers.
- Supporting the continuous improvement of verification methodologies and processes.
- Fostering collaboration and knowledge sharing within a global team, enhancing overall team performance.
