What you'll do
You'll be responsible for managing digital design, verification, firmware, emulation, and silicon testing flows for HPC SERDES IPs, and drive improvements. You'll collaborate closely with multiple product owners to identify resourcing requirements, prioritize key initiatives, track progress, and create executive summaries for Synopsys and Customer management.
- Understand the digital design, verification, firmware, emulation, and silicon testing flows for HPC SERDES IPs, and drive improvements.
- Collaborating closely with multiple product owners to identify resourcing requirements, prioritize key initiatives, track progress, and create executive summaries for Synopsys and Customer management.
- Driving efficiency improvement initiatives in the SERDES digital organization, working closely with IPG and TPG counterparts.
- Engaging in silicon debugging and handling customer communication in case of escalations.
- Scripting in Python/Perland efficiently prompting AI agents for flow automations.
What you need
- Expertise in digital design concepts: RTL, testbenches, synthesis constraints, CDC, and timing models for mixed-signal blocks.
- Proficiency in Verilog and System Verilog.
- Knowledge of PCIe and Ethernet protocols, specific to PHY or link layer.
- Strong scripting skills in Python/Perl and the ability to efficiently prompt AI agents for flow automations.
- You excel in technical discussions and summarizing key points for executive roll-ups.
- Strong organizational skills to track multiple tasks across various projects.
- Excellent communication skills to drive meetings, confidently challenge decisions, and summarize key points for executive roll-ups.
- Experience in silicon debugging and handling customer communication in case of escalations, is a plus.
- Eagerness to learn new skills and excitement to explore new technologies.
Why this matters
- Contributing to the success of Synopsys by aligning and enforcing common development practices across all HPC SERDES products.
- Driving alignment and clarity among project teams, accelerating innovation and delivery.
- Influencing global standards in digital design and mixed-signal co-simulations through robust technical strategies.
- Empowering teams to resolve technical challenges and reach milestones efficiently.
- Fostering a collaborative and inclusive engineering culture.
