We are seeking a skilled ASIC Digital Design professional to join our team in Bengaluru. As a staff engineer, you will be responsible for leading and executing scan insertion and ATPG flows for complex ASIC designs. You will work closely with RTL and Verification teams to ensure DFT requirements are integrated early in the design cycle. You will analyze and resolve DFT-related issues using tools such as Spyglass DFT, ensuring robust test coverage and manufacturability.
Key responsibilities include:
- Lead and execute scan insertion and ATPG flows for complex ASIC designs
- Work closely with RTL and Verification teams to ensure DFT requirements are integrated early in the design cycle
- Analyze and resolve DFT-related issues using tools such as Spyglass DFT, ensuring robust test coverage and manufacturability
- Perform scan STA to validate timing closure and optimize testability paths
- Collaborate with cross-functional teams to define and implement best practices for DFT methodologies and flows
- Contribute to the continuous improvement of automation scripts and design flows to boost efficiency and reduce turnaround time
As a staff engineer, you will have the opportunity to work on industry-leading products that power the next wave of intelligent systems. You will be part of a dynamic and innovative DFT team within Synopsys' Engineering organization in Bangalore. The team is dedicated to advancing ASIC testability and reliability, working collaboratively with design, verification, and software groups across the globe.
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
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