You will work with customers designing some of the most complex chips in automotive, AI, and consumer electronics, and what you deliver will directly determine whether their silicon works on the first spin.
Deliver end-to-end DFT solutions for customer designs, from architecture planning and scan insertion through pattern generation, silicon bring-up, and diagnostics analysis.
Implement and validate test solutions including scan, MBIST, and IEEE 1687 architectures for complex SoCs with multiple IP blocks.
Participate in customer design reviews to understand their flows, identify gaps, and propose specific improvements that reduce test time or increase coverage.
Prototype and validate new DFT methodologies in collaboration with Solution Architects, proving out viability before customer deployment.
Provide technical support and training to customers, including hands-on problem resolution, methodology workshops, and account-level engagement.
Conduct product demonstrations, competitive benchmarking, and evaluations to help win new customers and expand adoption of Synopsys test solutions.
Analyse silicon test data, diagnose failures, and present findings to both internal teams and customer stakeholders with clear recommendations.
Enable first-time silicon success for customers by delivering robust, validated DFT solutions that catch issues before tapeout.
Accelerate time-to-market for automotive and consumer electronics customers by optimising their test flows and reducing pattern generation cycles.
Expand Synopsys' footprint in next-generation test technologies by proving out new methodologies that become standard practice across accounts.
Build long-term customer relationships that turn one-time engagements into strategic partnerships, increasing account value and retention.
Raise the technical capability of customer teams through training and knowledge transfer, creating a multiplier effect beyond individual projects.
Shape the direction of Synopsys test products by feeding real-world customer challenges and use cases back to R&D teams.
Contribute to measurable improvements in test coverage, pattern count reduction, and silicon yield across diverse customer programmes.
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