Opening. Our team is looking for a skilled ASIC Digital Design, Sr Engineer - DFT to join our Da Nang engineering team.
What you'll do
As a Sr Engineer - DFT, you will be responsible for defining and implementing DFT architecture for IP designs, performing SCAN insertion and ATPG simulation, analyzing and improving test coverage, developing STA DFT timing constraints, preparing DFT integration guidelines for SoC, and conducting quality checks and FMEDA/DFMEA analysis.
- Define and implement DFT architecture for IP designs
- Perform SCAN insertion and ATPG simulation
- Analyze and improve test coverage
- Develop STA DFT timing constraints
- Prepare DFT integration guidelines for SoC
- Conduct quality checks and FMEDA/DFMEA analysis
What you need
- BS/MS/PhD in Electronics or related field
- 2+ years DFT design experience
- Expertise in Scan insertion, ATPG, JTAG
- Experience with Synopsys tools (Design Compiler, VCS, TetraMAX)
- Scripting (Perl, TCL, Python) is a plus
Why this matters
- Enhance product reliability and quality
- Support functional safety standards (ISO26262, FUSA)
- Streamline SoC integration
- Reduce debug cycles and time-to-market
- Mentor peers
- Drive innovation in test methodology
Why you'll love this role
- Collaborate with a talented and diverse engineering team
- Work on challenging and complex projects
- Develop your skills and expertise in DFT design
- Contribute to the development of cutting-edge semiconductor solutions
Why you'll love working at Synopsys
- Join a global company with a strong presence in the semiconductor industry
- Work on projects that have a significant impact on the world
- Collaborate with a talented and diverse team of engineers and researchers
- Enjoy a comprehensive benefits package and competitive salary
How to apply
If you are a motivated and experienced engineer looking for a new challenge, please submit your application. We look forward to hearing from you!
