We are looking for a Package Design Engineer to join our team.
What you'll do
Ensuring Synopsys IP test chip packages meets performance requirements and helping customers explore their package solution space options with Synopsys IPs.
- Early design stage collaboration to optimize and define requirements for SIPI performance (e.g., bump maps)
- Support 25+ PHY Test Chip Package designs per year
- Help customers explore their package solution space options with Synopsys IPs
- Models, and analyze package substrate and PCB designs
- Coordination of package design phases, and flow
- Resolves a wide range of issues in creative way regularly
- Provides regular updates to manager on project status
- Represents the organization on business unit projects
What you need
- Minimum of 10+ years of relevant experience
- Good verbal and written English communication skills required
- Advanced circuit and transmission line theory knowledge required
- 3D Electromagnetic modeling experience (e.g. HFSS, or similar tool)
- Familiarity with both Windows and Linux operating systems
- Bachelor’s degree in Electrical, Electronic Engineering or equivalent