You are an accomplished ASIC Digital Implementation Engineer with a proven track record—over a decade—of developing high-speed digital IP cores and/or SOCs. Your expertise encompasses the full spectrum of ASIC design flow, from RTL to GDSII, and you are highly proficient in leading Synthesis and Place & Route tools, such as Synopsys Fusion Compiler.
What you'll do
- Developing a complete front-to-back end design implementation methodology (RTL to GDSII) using Synopsys' advanced tools and technologies.
- Collaborating with industry-leading design teams to achieve best-in-class Power, Performance, and Area (PPA) for IP designs.
- Evaluating and optimizing all aspects of the ASIC development flow, including design for test logic, synthesis, place & route, and timing/power (EM/IR) analysis.
What you need
- BS or MS in Electrical Engineering or related discipline, with 10+ years of hands-on experience in high-speed digital IP core and/or SOC development.
