What you'll do
Providing technical leadership and architectural direction for the design and emulation of advanced mixed-signal SoCs, including next-generation SerDes PHY products.
Driving the development and integration of hardware emulation strategies on FPGA platforms (Zebu, HAPS).
Orchestrating the build and validation of system-level prototypes for industry-leading protocols (PCIE, Ethernet, USB, etc.), ensuring seamless integration with PHY builds.
Guiding the creation and optimization of verification environments using UVM and SystemVerilog, overseeing testbench and VIP integration for complex architectures.
Leading automation initiatives and workflow enhancements through advanced scripting in Shell, Perl, Python, and C++.
Mentoring and coaching engineering teams, fostering technical excellence and knowledge sharing across the organization.
Collaborating with cross-functional groups and customers to resolve challenges, ensure design quality, and meet aggressive project milestones.
Driving continuous improvement in functional and performance testing on hardware and test-chips, and leading architectural refinements based on analysis.
What you need
15+ years of experience in ASIC design, verification, system validation, and technical leadership roles.
Recognized expertise with hardware emulation platforms (Zebu, HAPS) and FPGA-based prototyping for signal PHY and back-to-back systems.
In-depth knowledge of system-level validation for high-speed protocols (PCIE, Ethernet, USB) and digital signal processing architectures.
Proven leadership in developing and optimizing UVM-based verification environments and SystemVerilog testbenches.
Advanced scripting proficiency in Shell, Perl, Python, and C++ for workflow automation and process improvement.
Experience in building and deploying RIK and integrating system builds with PHY hardware.
Strong track record of mentoring, coaching, and leading engineering teams to technical excellence.
Excellent communication, stakeholder management, and organizational skills.
Why this matters
Set the strategic technical direction for flagship silicon IP products, influencing industry standards and Synopsys’ product roadmap.
Accelerate product innovation and time-to-market by establishing best practices in emulation, validation, and system integration.
Enhance product differentiation, reliability, and performance—delivering measurable value to global customers.
Drive cross-team synergy, technical mentorship, and a culture of continuous learning and inclusivity.
Elevate Synopsys’ reputation as a leader in advanced SerDes and PHY solutions for high-performance SoCs.
Directly impact customer success by providing expert guidance, technical support, and innovative solutions.
Why you'll love this role
Join a world-class team of principal and senior engineers specializing in the design, emulation, and validation of advanced silicon IP solutions.
Collaborate across domains to deliver industry-defining products for global customers.
Play a pivotal role in shaping technical strategy, mentoring top talent, and driving breakthrough solutions that push the boundaries of what’s possible in high-performance SoC design.
What you'll get
Competitive salaries.
Comprehensive medical and healthcare plans that work for you and your family.
Time Away In addition to company holidays, we have ETO and FTO Programs.
Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.
Retirement Plans Save for your future with our retirement plans that vary by region and country.
Rewards and Benefits We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.
